1. Field of the Invention
This invention relates to integrated circuits, and more particularly to probe testing of integrated circuits.
2. Description of the Related Art
The following descriptions and examples are not admitted to be prior art by virtue of their inclusion within this section.
Integrated circuits have evolved over the years. They have become increasingly more complex in functionality, and encompass more features and operate at higher speeds than predecessor circuits. In addition, modern integrated circuits employ smaller critical dimensions and use more and more of interconnect. As the integrated circuit becomes smaller in critical dimension, and more dense in overall circuitry, the number of bonding pads per integrated circuit has also increased.
Typically, the bonding pads of an integrated circuit are arranged on the periphery of that circuit. An integrated circuit can encompass a single dice within a plurality of die which form a wafer. Generally, the bonding pads are arranged near the outer edge of the die. The bonding pads extend along a single line, or axis, adjacent each of the four edges of the dice. The bonding pads can be either wire-bonded to posts upon a package, or they can be surface mounted in a flip-chip application.
The bonding pads are generally made of aluminum or an aluminum alloy. When bonding a gold wire to the bonding pad, the wire is directed to the bonding pad using a capillary and a ball is formed at the end of the capillary. Ultrasonic energy and temperature along with a bond force creates the diffusion of the gold into the aluminum forming an intermettalic. The wire is typically small in diameter compared to the bonding pad. However, as the size of the bonding pad decreases, it is imperative that sufficient aluminum be retained on the bonding pad after the probe test operation. If aluminum is scraped off by the probe needle during probe test, the ensuing wire bond will be jeopardized.
Prior to bonding wires being applied to corresponding bonding pads, each integrated circuit is tested during a probe operation. Typical probe operations involve placing a bed of closely configured probe needles on each and every bonding pad of an integrated circuit and testing that circuit. Thereafter, the bed of probe needles are moved to the neighboring integrated circuit and applied to a new set of bonding pads until each and every integrated circuit upon the wafer is functionally tested. The tips of the probe needles are desirably less in diameter than the bonding pad area. However, through repeated contact with bonding pads, the probe needles can become displaced. Depending on the density by which the bonding pads are arranged around the periphery of an integrated circuit, a probe needle could miss the bonding pad or contact possibly two closely spaced bonding pads, and thereby show a failure in the test operation when, instead, the integrated circuit may be electrically acceptable.
While it is desirable to make probe needles as thin as possible to accommodate closely spaced bonding pads, there is a limit to the thinness of the probe needles. Not only will thinner probe needles show a greater propensity to becoming displaced, but the tips of the thinner probe needles will have a significantly shorter lifespan.
It would be desirable to provide a mechanism for probing bonding pads of an integrated circuit during the wafer sort electrical test, yet would not require the use of thinner needles to probe densely spaced bonding pads. It would be further desirable to effectively spread out the distribution of the bonding pads to increase the perceived bonding pad pitch. This would allow a thicker set of probe needles to be used spaced relatively far from one another even though the bonding pad pitch remains fairly close. The desired improvements would, therefore, achieve a virtual bonding pad displaced from the normal set of bonding pads to allow probing of that pad, yet prevents probing the densely-spaced bonding pad that will eventually receive a wire bond. By not having to probe a densely spaced bonding pad, instances of gouging the bonding pad which will eventually receive a wire bond is eliminated.
The problems outlined above may be in large part solved by an integrated circuit topography that includes at least two rows of bonding pads configured about each integrated circuit perimeter. The bonding pads are configured on the upper topography of the integrated circuit, and preferably receive a wire bond. Alternatively, the bonding pads can be surface-mounted in a flip-chip arrangement. In addition to the bonding pads, dedicated probe pads are available. The probe pads are connected to respective bonding pads. Instead of probing all of the bonding pads, a probe operator will advantageously connect probe needles to the probe pads attributed to some of the bonding pads. This leaves the bonding pads, to which the probe pads are connected, in a pristine condition. No gouging, scraping, or material dislocation occurs on various bonding pads that would deleteriously effect bonding to that pad.
According to one embodiment, every other bonding pad within a first row of bonding pads is connected to every other probe pad within a third row of probe pads. Moreover, every other bonding pad within a second row of bonding pads is connected to every other probe pad within a fourth row of probe pads. The third row of probe pads extends a spaced distance from the first and second rows of bonding pads, and it is parallel to the two rows of bonding pads. The same can be said for the fourth row of probe pads that extends along an axis spaced from the rows of bonding pads, yet parallel to the axis along which the rows of bonding pads are spaced.
The third row of probe pads are preferably located within a scribe area of the integrated circuit. Thus, the third row of probe pads are sacrificial pads which, after probing is completed, are scribed in order to separate neighboring integrated circuits during the wafer xe2x80x9cdicingxe2x80x9d operation. The fourth row of probe pads are preferably closer to the interior of the integrated circuit than the two rows of bonding pads. The integrated circuit can be laid out so that metal conductors do not extend in the path of the fourth row of probe pads and in the path of any trace conductors which extend between the fourth row of probe pads and every other bonding pad within a row of bonding pads. If necessary, the trace conductors can be arranged on a layer beneath the topography on which the probe pads and bonding pads are configured. This will allow conductors to extend above the trace conductors, yet allowing them to be electrically isolated from the trace conductors. Placing the trace conductors on lower level portions of the integrated circuit is accomplished by patterning the trace conductors on, for example, the first layer of metal and placing vias between the first layer of metal and, for example, a second layer of metal on which the bonding pads and probe pads exist.
Advantageously, only the bonding pads are receptors for bonding to a package, substrate, or printed circuit board in a wire bond or flip-chip arrangement. The probe pads are purposely designed not as receptors for bonding to a wire, substrate, or printed circuit board. Instead, the probe pads can only receive probe needles.
By connecting every other bonding pad within one row to probe pads, and connecting every other bonding pad within another row of bonding pads to corresponding rows of probe pads, an effective fan-out configuration can be achieved. This will then redistribute the perceived pitch of the bonding pads during a probe operation. Instead of having to probe each and every bonding pad, the probe needles can be configured to only probe every other one of the bonding pads, and each of the probe pads which, advantageously, are spread out from the densely patterned bonding pads.
Although two rows of bonding pads are envisioned in the most simple form, more than two rows can be achieved. In fact, if a third row of bonding pads exists, then a corresponding additional row of probe pads will be needed. The additional row of probe pads, or sixth row of probe pads, will connect to every other bonding pad within a fifth row of bonding pads. The fifth row of bonding pads preferably has the same pitch between bonding pads as the first and second rows of bonding pads, and extends in a row parallel to the first and second rows of bonding pads.